LS3B6000 Specification
Frequency
2.0GHz-2.3GHz
Peak double-precision floating-point performance
441.6GFlops@2.3GHz(8-core);633.6GFlops@2.2GHz(12-core);768GFlops@2.0GHz(16-core)
Physical cores
8/12/16
Logical cores
16/24/32
Processor core
64-bit superscalar LA664 core; Instruction Set Architecture: LoongArch™ ISA; Supports 128/256-bit vector instructions; 6-issue out-of-order execution; 4×fixed-point units,4×vector units,and 4×memory access units
High-speed cache
Each processor core contains 64KB private L1 instruction cache and 64KB private L1 data cache; Each processor core contains 256KB private L2 cache; All processor cores share a 32MB L3 cache
Memory controller
2×72-bit DDR4-3200
High-speed I/O
2×PCIe×16 interfaces,total 32 Lane,multiplexed by 4 controllers
Other I/O
SPI,UART,I2C,AVS,GPIO
Security module
Loongson SE, integrated with LA264 processor core, supports SM2/3/4
Packaging
FCBGA1371
Power management
Supports dynamic clock gating for major modules; Supports dynamic frequency scaling for major clocks; Supports dynamic voltage scaling for main voltage domains
Typical power consumption
80W@2.3GHz