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LS3D5000 Specification

Cores

32 LA464 cores

Frequency

≥2.0GHz

Peak computing speed

1,024GFLOPS@2.0GHz

High-speed cache

Each core includes a 64KB private L1 instruction cache and a 64KB private L1 data cache. Each core contains 256KB private L2 cache. All processor cores share a 64MB L3 cache.

Memory controller

Eight 72-bit DDR4-3200 controllers; supporting ECC

High-speed I/O

1 HyperTransport 3.0 I/O interface (DIE0_HT0)

Other I/O

1 SPI, 1 UART, 5 I2Cs, and 16 GPIO interfaces

Packaging

LGA-4129

Power management

Supporting dynamic shutdown of the clocks of main modules; supporting dynamic frequency scaling in main clock domains; supporting dynamic voltage scaling in main voltage domains

Typical power consumption

160W@2.0GHz

LS3D5000 Manual

LS3D5000 Application